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    <title>Hartley Ultrafast - Blog</title>
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      <title><![CDATA[FPGA integration]]></title>
      <link>https://hartleyultrafast.com/blog/fpga-integration</link>
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      <description><![CDATA[Hartley joins Altera's global ASAP partner network, coupling its optoelectronic neural processing units with the world's #1 pure-play FPGA platform to bring nanosecond-scale AI to defence, industrial control, and capital markets.]]></description>
      <pubDate>Tue, 07 Apr 2026 12:00:20 GMT</pubDate>
      <author>Hartley Ultrafast</author>
      
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      <content:encoded><![CDATA[FPGAs are the ultimate in versatile, programmable computing hardware. They power real-time, mission-critical systems today, from nuclear reactor control and mile-per-second interceptors to real-time market liquidity injection. Hartley is bringing the deep intelligence of AI and ML into these same environments, without compromising on determinism or speed. That’s why our new partnership with Altera matters. By integrating with FPGAs, rather than trying to replace them, we lower adoption risk, shorten integration cycles, and unlock a massively programmable, ultrafast hybrid intelligence platform for use wherever time is of the essence. Hartley is partnering with Altera to bring hybrid neuromorphic-plus-digital computing to the market for real-time intelligence. Altera Corporation is the world’s #1 pure-play FPGA vendor and a global leader in programmable semiconductor solutions. Its technology forms the backbone of many of humanity's most demanding intelligent systems, where flexibility and performance are non‑negotiable. As a member of Altera’s global ASAP partner network, Hartley Ultrafast gains enhanced technical and commercial access, coupling ONPU performance with FPGA versatility on a proven platform. Hartley’s optoelectronic neural processing units (ONPUs) combine photonics and electronics to deliver nanosecond-scale latency for small, dense AI models. This creates an opportunity for human-on-the-loop and algorithmic decision-making at timescales that were previously unthinkable. At the core of this partnership is a shared focus on real-time, system-level performance. Hartley’s ultrafast photonic compute, tightly coupled with Altera’s programmable FPGA infrastructure, enables a new class of computing hardware where speed, determinism, and flexibility are designed in from day one. For customers, that means familiar FPGA development flows and toolchains, with a new low-latency AI building block available as a drop‑in platform extension. Through the ASAP Programme, Hartley will work closely with Altera’s engineering and commercial teams to advance platform development, integration, and validation. This collaboration expands opportunities across multiple industries—defence, industrial control, network intelligence, capital markets, and beyond—by making ultrafast AI more accessible to existing FPGA deployments. Hartley is positioned within a wider ecosystem of system integrators, developers, and technology leaders who are reshaping the future of compute. This technology partnership—FPGA + ONPU—and commercial partnership—Altera + Hartley—brings us much closer to realising human agency in a new domain of speed. “We’re thrilled to be working with the best in the FPGA business to make ultrafast intelligence a reality in all the applications where time matters most.” -Josh Silverstone, Hartley Ultrafast]]></content:encoded>
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      <title><![CDATA[Architectural proof of concept]]></title>
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      <description><![CDATA[Babbage is our ultrafast inference proof of concept. This document provides a brief overview of Babbage's key features and design, and highlights some key results.]]></description>
      <pubDate>Mon, 06 Apr 2026 12:00:19 GMT</pubDate>
      <author>Hartley Ultrafast</author>
      
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      <content:encoded><![CDATA[Until you build a thing, you never truly know if it works. Simulations and theory are essential prerequisites, but experiment is where ideas are proven. For us, that presented a challenge: how can we build proof for a technology which demands cutting-edge silicon and requires significant capital? We wanted to demonstrate that our architecture can crush inference latency, without asking people to take it on faith or to trust only in (very good) computer modelling. The answer was to separate out the core innovations at the heart of our architecture which do not rely on chip-scale implementation from those that do. We took these hardware-agnostic innovations and decided to build a system that would prove to ourselves and the outside world that not only do these ideas work, but they work fast.  The result is Babbage: our proof-of-concept optoelectronic system for ultrafast inference. It uses fibre optics with a mixture of bespoke analog and digital electronics to perform inference on a 4-neuron-wide, 3-layer-deep neural network in just 176 nanoseconds, faster than is possible on the latest GPU hardware  Blackwell . This system let us verify two key innovations: Clockwork, our time-synchronisation system, and our ultrafast analog electronic Decision Engine. What is Babbage? Charles Babbage (1791–1871) was English inventor who designed the first programmable computer, the Analytical Engine. Like our proof-of-concept system, named in his honour, it contained a lot of mechanics. Babbage implements a network with three layers of neurons, input, hidden, and output, and two linear layers in between them. In the input layer, an embedded digital system puts inference queries into the optical domain, using four lithium niobate Mach-Zehnder modulators. These optical signals pass through the first optomechanical linear layer, consisting of 32 motorised fibre winders. Each winder tunes the optical loss, and a pair of them sets one weight matrix element, effectively multiplying the optical input signal by the winder's position. Taken together, the weights perform a 4×4 linear transformation between the input and hidden layers. Within the hidden layer, the optical signals fan-in to each neuron, get converted to the electrical domain, then are synchronised and have neuronal nonlinear activation functions applied using our Clockwork technology. Four modulators then return the post-activations to the optical domain, and the second linear layer transforms them to produce the network's output signals. Clockwork again synchronises these and passes them to the Decision Engine, which returns ordinal data with extremely low latency. The embedded digital system then reads out the result. Babbage is a fully functional neuromorphic system that uses, and proves, key parts of our architecture, but at a scale and cost that makes rapid experimentation possible. Model development and upload With hardware in hand, the next challenge is obtaining models that will run on it. Babbage belongs to a class of hardware called in-memory compute: rather than shuttling model data to and from memory, the model weights live directly in the physical fabric of the machine, and inference is simply the act of data passing through it. This is part of what makes inference so fast, but it also makes weight updates and training slow. Training with hardware in the loop would be time-consuming, but, more importantly, hardware-in-the-loop training would be a big pain for our customers. Instead, we developed a digital twin using compact data from the hardware itself, and trained that. This unlocks all-digital, offline training, using standard machine learning tooling and workflows. With a trained digital model in hand, we upload the weights and biases to the hardware and run inference, without any other intervention. For customers, that means transparent model development and training processes with familiar toolchains, but with ultrafast, deterministic inference performance. Inference speed Figure 3 shows an example binary classifier trained entirely on the digital twin. Uploaded directly to Babbage with no retraining, the same model achieves 99.2% accuracy. Accuracy is essential, but it is not the headline here. The special thing about Babbage is that it answers questions in just 176 nanoseconds, faster than is possible on the latest GPU hardware  Blackwell . Figure 3 also shows a breakdown of Babbage's analog latency. Notably, almost all of that latency comes from propagation through optical fibre, not the optoelectronic processing itself. For system designers used to working around millisecond or microsecond delays, this shift into the nanosecond regime changes what is possible for human-on-the-loop and algorithmic decision-making. An architectural proof of concept Babbage was built to validate our hardware-agnostic IP: our synchronisation system, Clockwork, and our ultrafast Decision Engine. The accuracy, with a model trained entirely digitally, confirms that Clockwork correctly handles the timing and that the Decision Engine provides a rapid, faithful ADC bypass for decision problems. Babbage also demonstrates a key principle of low-latency inference: the optomechanical weights in Babbage are slow to move, but are fixed during operation. Computation happens at the speed of the electronic-photonic system, independent of motor movement. This is the core advantage of in-memory compute: the model is stored in place, while inference queries move through the system. In Babbage, motor positions store the model, and inference data effectively moves around at the speed of light. Outlook So how fast can we move inference data in future? Babbage gives us a clear answer. With the latency dominated by propagation in roughly 30 metres of fibre, the path is obvious: reduce propagation. On chip, integration with optical waveguides enables millimetre-scale paths, so propagation no longer dominates. Not only will chip-scale integration crush the inference latency even further, it will also let us massively scale up the supported model size. Babbage is therefore both a proof of concept and a roadmap. It validates the core building blocks of Hartley’s architecture today, and it points directly to a future where ultrafast, optoelectronic neural processing units can be deployed alongside existing digital platforms to bring a new domain of speed to real-time, mission-critical intelligence.]]></content:encoded>
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      <title><![CDATA[Hartley emerges from stealth]]></title>
      <link>https://hartleyultrafast.com/blog/hartley-emerges-from-stealth</link>
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      <description><![CDATA[Bristol-based deep-tech start-up Hartley Ultrafast has emerged from stealth, unveiling Babbage: a photonic neural network computer that runs AI inference in around 160 nanoseconds, bringing decision-making to a new domain of speed.]]></description>
      <pubDate>Sun, 05 Apr 2026 12:00:11 GMT</pubDate>
      <author>Hartley Ultrafast</author>
      
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      <content:encoded><![CDATA[Hartley Ultrafast, a deep-tech hardware company based in Bristol UK, today emerged from stealth at the  Microelectronics UK 2025  expo in London, revealing its vision for ultrafast optoelectronic accelerators and demonstrating its first photonic computer,  Babbage . Hartley is building the world's fastest decision making machines, bringing artificial intelligence to the scale of single nanoseconds for the first time. Its proprietary  optoelectronic architecture  encodes information in pulses of light for frictionless data flow and ultrafast calculations, and uses fast electronics to emulate neural excitations. This hybrid approach brings the  speed of light  to machine intelligence, minimising the latency that prevents AI usage in critical real-time applications. "The really intuitive, human decisions we make everyday, spotting trends and risks, following hunches, computers can now contemplate these decisions too," said founder and CEO, Dr Josh Silverstone. "At Hartley, we're bringing these human-like snap decisions to previously impossible timescales, and opening up a whole new world of opportunity." Proving the concept: Babbage At Microelectronics UK, the Hartley team unveiled their architectural proof of concept machine,  Babbage , the company's first photonic neural network computer. Using  time-of-flight processing  and  opto-mechanical weights , Babbage runs AI inferences in around 176 nanoseconds. Remarkably, 85% of this delay is simply the time it takes for light to traverse the device's optical fibre. The team named this first machine for Victorian visionary  Charles Babbage , whose mechanical computer designs laid the foundation of modern digital computing. Indeed, the company's own designs resemble a photonic clockwork that the great man himself might have recognised. Though Hartley plans a series of multimillion-pound photonic chips to implement their low-latency vision, Babbage was built with  budget telecom components  at a fraction of the cost. Despite this, it validates key elements of the company's patent-pending architecture, proving that key barriers such as jitter and noise can be overcome. Looking ahead, Hartley expects its first-generation chip to be  a billion times smaller , with  100x more neurons , running  100x faster  and with less than  1/1000 the energy . Bristol, city of lateral thinking Bristol has long been home to radical feats of engineering, from the roar of Concorde's quarter-million horsepower to the quiet breakthroughs of its quantum labs. Hartley Ultrafast draws on this heritage. After a decade of photonic quantum computing architecture, the Hartley team is now harnessing that technology to make human agency faster.]]></content:encoded>
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